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| data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 1 general description the ap3586a/b/c is a compact synchronous -rectified buck controller specifically designed to operate from 5v or 12v supply voltage and deliver high-quality output voltage as low as 0.6v (ap3586a) or 0.8v (ap3586b/c). this device operates at fixed 300khz (ap3586a/b) or 200khz (ap3586c) frequency and provides an optimal level of integration to reduce size and cost of the power supply. this controller integrates internal mosfet drivers that support 12v+12v bootstrapped voltage for high- efficiency power conversion. the bootstrap diode is built-in to simplify the circuit design and minimize external part count. this controller provides single feedback loop, voltage-mode control with fast transient response. the error amplifier features a 10mhz gain-bandwidth product and 6v/s slew rate which enables high converter bandwidth for fast transient performance. other features include internal soft-start, under voltage protection, over current protection and shutdown function. with afore-mentioned functions, this part provides cu stomers a compact, high efficiency, well-protected and cost-effective solutions. the ap3586a/b/c is available in soic-8 and psop-8 packages. features ? supply voltage: 5v/12v ? v in input range: 3.3v to 12v ? 0.6v/0.8v to 82% of v in output range ? internal reference: 0.6v/0.8v ? simple single-loop control ? voltage-mode pwm control ? duty cycle: 0% to 82% ? fast transient response ? 10mhz high-bandwidth error amplifier with 6v/s slew rate ? fixed oscillator frequency: 300khz/200khz ? lossless, programmabl e over current protection (uses lower mosfet r ds(on) ) ? start-up into pre-biased load ? built-in thermal shutdown ? built-in soft-start ? over current protection ? over voltage protection ? under voltage protection ? integrated boot diode applications ? subsystem power supplies ? pci, agp, graphics cards, digital tv ? sstl-2 and ddr/2/3 sdram bus termination supply ? cable modems, set top boxes, and dsl modems ? industrial power supplies and general purpose supplies figure 1. package types of ap3586a/b/c soic-8/psop-8
data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 2 pin configuration mp package (psop-8) 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 figure 2. pin configuration of ap3586a/b/c (top view) pin description pin number soic-8 psop-8 pin name function 1 1 boot bootstrap pin. connect a bootstrap capacitor from this pin to phase for creating a boot voltage suitable to drive a standard n-channel mosfet. 2 2 ugate upper-gate drive pin. connect th is pin to the upper mosfet gate providing the gate drive. this pi n is monitored by the adaptive shoot-through protection circuitry to determine when the upper mosfet has turned off. 3 3 gnd ground for the ic. all voltage levels are measured with respect to this pin. connect this pin directly to the low side mosfet source and ground plane with the lowest impedance. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 4 4 lgate/ocset low-side gate driver output and over-current setting input. this pin is the gate driver for low-side mosfet. it is also used to set the maximum inductor current . refer to the section in ?function description? for detail. 5 5 vcc bias supply pin. provides a 5v or 12v bias supply for the chip from this pin. the pin should be bypassed with a capacitor to gnd. 6 6 fb feedback pin. this pin is the inverting input of the internal error amplifier. use fb pin, in combination with the comp pin, to compensate the voltage control feedback loop of the converter. a resistor divide r from output to gnd is used to set the output voltage. 7 7 comp/en compensation and disable pin. this pin is the output of the error amplifier. pull comp pin low will shut down the ic. 8 8 phase this pin connects to the source of the upper mosfet and the drain of the lower mosfet. this pin is also monitored by the adaptive shoot-through protection ci rcuitry to determine when the upper mosfet has turned off. 9 exposed pad exposed pad as ground pin. m package (soic-8) data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 3 functional block diagram figure 3. functional block diagram of ap3586a/b/c /ocset 1 2 3 4 5 6 7 8 /en / 0.6v data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 4 ordering information ap3586 - package temperature range part number marking id packing type ap3586am-g1 3586am-g1 tube ap3586amtr-g1 3586am-g1 tape & reel ap3586bm-g1 3586bm-g1 tube ap3586bmtr-g1 3586bm-g1 tape & reel ap3586cm-g1 3586cm-g1 tube soic-8 ap3586cmtr-g1 3586cm-g1 tape & reel AP3586AMP-G1 3586amp-g1 tube ap3586amptr-g1 3586amp-g1 tape & reel ap3586bmp-g1 3586bmp-g1 tube ap3586bmptr-g1 3586bmp-g1 tape & reel ap3586cmp-g1 3586cmp-g1 tube psop-8 -40 to 85c ap3586cmptr-g1 3586cmp-g1 tape & reel bcd semiconductor's pb-free products, as designated with "g1" suffix in the part number, are rohs compliant and green. g1: green blank: tube tr: tape & reel circuit type a: ap3586a b: ap3586b c: ap3586c package m: soic-8 mp: psop-8 data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 5 absolute maximum ratings (note 1) parameter symbol value unit supply input voltage v cc -0.3 to 15 v boot voltage v boot -0.3 to v phase +15 v ugate to phase voltage v ugate -0.3 to 15 v phase, lgate to gnd voltage v phase , v lgate -1 to 15 v other pin voltage -0.3 to 6 v power dissipation p d tbd mw thermal resistance ja 50 oc/w operating junction temperature t j -40 to 125 oc storage temperature t stg -65 to 150 oc lead temperature (soldering, 10 sec) t lead 260 oc esd (human body model) (note 2) 2000 v esd (machine model) (note 2) 200 v note 1: stresses greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating co nditions? is not implied. exposure to ?absolute maximum ratings? for extended periods may affect device reliability. note 2: devices are esd sensitive. handling precaution is recommended. recommended operating conditions parameter symbol min max unit supply input voltage v cc 5 12 v operating ambient temperature t a -40 85 c data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 6 electrical characteristics v cc =12v, t a =25 c, unless otherwise specified. parameter symbol conditions min typ max unit supply input supply current i cc ugate and lgate pins open; switching 5 ma quiescent supply current i cc_q v fb =v ref +0.1v, no switching 4 ma power input voltage v in 3.0 13.2 v power on reset v cc rising threshold v por v cc rising 4.0 4.2 4.4 v v cc threshold hysteresis v por_hys 500 mv oscillator for ap3586a/b 270 300 330 khz oscillator frequency f osc for ap3586c 180 200 220 khz ramp amplitude ? v osc 1.4 v p-p error amplifier open loop dc gain g dc_ol 55 70 db gain-bandwidth product g bw 10 mhz slew rate sr 3 6 v/ s transconductance 800 1100 a/v output source current v fb data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 7 electrical characteristics (continued) v cc =12v, t a =25oc, unless otherwise specified. parameter symbol conditions min typ max unit minimum duty cycle 0 % maximum duty cycle 75 82 89 % reference voltage ap3586a 0.591 0.6 0.609 v feedback voltage v fb ap3586b/c 0.788 0.8 0.812 v feedback bias current i fb v fb =5v 10 50 na protection under voltage protection v fb_uvp 0.3 0.4 0.5 v over voltage protection v fb_ovp 1.1 v oc current source i ops 19.5 21.5 23.5 a built-in maximum ocp voltage v ocp_max 0.3 v ap3586a 2 ap3586b 2.7 soft-start interval t ss ap3586c 3.6 ms enable threshold v comp/en 0.25 0.30 0.35 v thermal shutdown t otsd 160 oc thermal shutdown hysteresis t hys 20 oc data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 8 typical performance characteristics figure 4. line regulation figure 5. load regulation figure 6. switching fr equency vs. temperature figure 7. switching frequency vs. input voltage -40 -20 0 20 40 60 80 100 120 270 275 280 285 290 295 300 305 310 315 320 switching frequency (khz) temperature ( o c) 4 5 6 7 8 9 10 11 12 13 14 270 275 280 285 290 295 300 305 310 315 320 switching frequency (khz) input voltage (v) 5678910111213 -1.0 -0.5 0.0 0.5 1.0 output voltage variation (%) input voltage (v) v out = 1.2v 0 2 4 6 8 101214161820 -4 -3 -2 -1 0 1 2 3 4 output voltage variation (%) output current (a) v out = 1.2v data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 9 typical performance characteristics (continued) figure 8. reference voltage vs. temperature figure 9. reference voltage vs. input voltage figure 10. power-on waveform figure 11. enable waveform (v in =12v, v out =1.2v, i out =0a) (v in =12v, v out =1.2v, i out =0a) -40 -20 0 20 40 60 80 100 120 0.790 0.792 0.794 0.796 0.798 0.800 0.802 0.804 0.806 0.808 0.810 reference voltage (v) temperature ( o c) 4567891011121314 0.790 0.792 0.794 0.796 0.798 0.800 0.802 0.804 0.806 0.808 0.810 reference voltage (v) input voltage (v) v in 10v/div v out 0.5v/div time 1ms/div i l 5a/div v comp 0.5v/div v lgate 5v/div v out 0.5v/div v comp 1v/div v lgate 20v/div time 2ms/div data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 10 typical performance characteristics (continued) figure 12. load transient response figure 13. load transient response (v in =12v, v out =1.2v, i out =0a to 10a) (v in =12v, v out =1.2v, i out =0a to 20a) figure 14. over current protection figure 15. under voltage protection (v in =12v, v out =1.2v, i out =20a) (v in =12v, v out =1.2v, i out =20a) v out_ac 50mv/div v in 10v/div v ugate 10v/div i out 2a/div time 20 data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 11 typical application figure 16. typical application circuit of ap3586a/b/c data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 12 function description the ap3586a/b/c is a voltage-mode single phase synchronous buck controller with embedded mosfet drivers. this part provides complete protection functions such as over voltage protection, under voltage protection and over current protection. inductor current information is sensed by r ds(on) of the low side mosfet. the over current protection threshold can be simply programmed by a resistor. power on reset and chip enable a power on reset (por) circuitry continuously monitors the supply voltage at vcc pin. once the rising por threshold is exceeded, the ap3586a/b/c sets itself to active state an d is ready to accept chip enable command. the rising por threshold is typically 4.2v at vcc rising. the comp/en is a multifunctional pin: control loop compensation and chip enable as shown in figure 17. an enable comparator monitors the comp/en pin voltage for chip enable. a signal level transistor is adequate to pull this pin down to ground and shut down ap3586. a 120 a current source charges the external compensation network with 0.45v ceiling when this pin is released. if the voltage at comp/en pin exceeds 0.3v, the ap3586a/b/c initiates its soft start cycle. the 120 a current source keeps charging the comp pin to its ceiling until the feedback loop boosts the comp pin higher than 0.45v according to the feedback signal. the curren t source is cut off when v comp is higher than 0.45v during normal operation. figure 17. chip enable function soft start a built-in soft start is used to prevent surge current from power supply input v in during turn-on (referring to the functional block diagram). the error amplifier is a thr ee-input device. reference voltage v ref or the internal soft start voltage ss whichever is smaller dominates the behavior of the non-inverting inputs of the error amplifier. ss internally ramps up to 0.6v in 2ms for ap3586a (to 0.8v in 2.7ms for ap3586b; to 0.8v in 3.6ms for ap3586c) after the soft start cycle is initiated. the ramp is created digitally, so there will be 100 small discrete steps. accordingly, the output voltage will follow the ss signal and ramp up smoothly to its target level. the ss signal keeps rampin g up after it exceeds the internal 0.6v (0.8v for ap3586b/c) reference voltage. however, the internal 0.6v(0.8v for ap3586b/c) reference voltage takes over the behavior of error amplifier after ss>v ref . when the ss signal climbs to its ceiling voltage (4.2v), ap3586a/b/c claims the end of soft start cycle and enables the under voltage protection of the output voltage. figure 18 shows a typical start up interval for ap3586a/b/c where the comp/en pin has been released from a grounded (system shutdown) state. the internal 120 a current source starts charge the compensation network after the comp/en pin is released from ground at t1. the comp/en exceeds 0.3v and enables the ap3586a/b/c at t2. the comp/en continues ramping up the stays at 0.45v before the ss starts ramping at t3. the output voltage follows the internal ss and ramps up to its final level during t3 and t4. at t4, the reference voltage v ref takes over the behavior of the error amplifier as the internal ss crosses v ref . the internal ss keeps ramping up and stays at 4.2v at t5, where ap3586a/b/c asserts the en d of soft start cycle. data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 13 v in 10v/div v out 0.5v/div i l 10a/div lgate 10v/div function description (continued) 1ms/div figure 18. soft start behavior of ap3586a/b/c power input detection the ap3586a/b/c detects phase voltage for the present of power input v in when ugate turns on the first time. if the phase voltage does not exceed 2.0v when ugate turns on, ap3586a/b/c asserts that v in is not ready and stops the soft start cycle. however, the internal ss continues ramping up to v dd . another soft start is initiated after ss ramps up to v dd . the hiccup period is about 1ms. figure 19 shows the start-up waveform where v in does not present initially. 1ms/div figure 19. soft start where v in does not present initially over current protection (ocp) a resistor r ocset connected from lgate pin sets the threshold. an internal current source i oc (21.5 a typically), flowing through r ocset determines the ocp trigger point, which can be calculated using the following equation: because the r ds(on) of mosfet increases with temperature, it is necessary to take this thermal effect into consideration in calculating ocp point. when ocp is triggered, both ugate and lgate will go low to stop the energy transfer to the load. controller will try to restart in a hiccupped way. figure 20 shows the hiccupped over current protection. only four times of hiccup is allowed in over current protection. if over current condition still exists after four times of hiccup, controller will be latched. figure 20. hiccupped over current protection over voltage protection (ovp) the feedback voltage is continuously monitored for over voltage protection. when ovp is triggered, lgate will go high and ugate will go low to discharge the output capacitor. the ap3586a/b/c provides full-time over voltage protection whenever soft start completes or not. the typical ovp threshold is 137.5% of the internal reference voltage v ref . ap3586a/b/c provides non-latched ovp. the controller will return to normal operation if over voltage condition is removed. under voltage protection (uvp) the feedback voltage is also monitored for under voltage protection. the under voltage protection has 15 s triggered delay. when uvp is triggered, both ugate and lgate will go low. unlike ocp, uvp is not a latched protection; controller will always try to restart in a hiccupped way. thermal shutdown if the junction temperature of the device reaches the thermal shutdown limit of 160c, the pwm and the v in 10v/div v out 0.5v/div comp 0.5v/div l g ate 1 0 v / div mosfet side low the of r r i 2 i ds(on) ocset ocset limit = data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 14 function description (continued) oscillator are turned off and ugate and lgate are driven low, turning off both mosfets. when the junction cools to the required level (140c nominal), the pwm initiates soft start as during a normal power-up cycle. output voltage selection the output voltage can be programmed to any level between the 0.6v internal reference (0.8v for ap3586b/c) to the 82% of v in supply. the lower limitation of output voltage is caused by the internal reference. the upper limitation of the output voltage is caused by the maximum available duty cycle (82%). this is to leave enough time for over-current detection. output voltage out of this range is not allowed. a voltage divider sets the output voltage (refer to the typical application circuit) . in real applications, choose r1 in 100 ? to 10k ? range and choose appropriate r2 according to the desired output voltage. ap3586a ap3586b/c pcb layout considerations high speed switching and relatively large peak currents in a synchronous -rectified buck converter make the pcb layout a very important part of design. switching current from one power device to another can generate voltage spikes across the impedances of the interconnecting bond wi res and circuit traces. the voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. careful component placement layout a printed circuit design can minimize the voltage spikes induced in the converter. follow the below layout guidelines for optimal performance of ap3586a/b/c. 1) the turn-off transition of the upper mosfet prior to turn-off, the upper mosfet was carrying the full load current. during turn-off, current stops flowing in the upper mosfet and is picked up by the low side mosfet. any inductance in the switched path generates a large voltage spike during the switching interval. careful component selections, layout of the critical components, and use shorter and wider pcb traces help in mini mizing the magnitude of voltage spikes. 2) the power components and the pwm controller should be placed fi rstly. place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. place the output inductor and output capacitors between the mosfets and the load. also locate the pwm controller near mosfets. 3) use a dedicated grounding plane and use vias to ground all critical components to this layer. use an immediate via to connect the component to ground plane including gnd of ap3586a/b/c. 4) apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. the power plane should support the input power and output power nodes. use copper filled polygons on the top and bottom circuit layers for the phase node. 5) the phase node is subject to very high dv/dt voltages. stray capacitance between this island and the surrounding circuitry tend to induce current spike and capacitive noise coupling. keep the sensitive circuit away from the phase node and keep the pcb area small to limit the capacitive coupling. however, the pcb area should be kept moderate since it also acts as main heat convection path of the lower mosfet. 6) the pcb traces between the pwm controller and the gate of mosfet and also the traces connecting source of mosfets should be sized to carry 2a peak currents. r2 r2 r1 0.6v v out + = r2 r2 r1 0.8v v out + = data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 15 mechanical dimensions soic-8 unit: mm(inch) 0 8 1 5 r 0 . 1 5 0 ( 0 . 0 0 6 ) r0.150(0.006) 1.000(0.039) 0.330(0.013) 0.510(0.020) 1.350(0.053) 1.750(0.069) 0.100(0.004) 0.300(0.012) 0.900(0.035) 0.800(0.031) 0.200(0.008) 3.800(0.150) 4.000(0.157) 7 7 2 0 : 1 d 1.270(0.050) typ 0.190(0.007) 0.250(0.010) 8 d 5.800(0.228) 6.200(0.244) 0.675(0.027) 0.725(0.029) 0.320(0.013) 8 0.450(0.017) 0.800(0.031) 4.700(0.185) 5.100(0.201) note: eject hole, oriented hole and mold mark is optional. data sheet single phase synchronous buck pwm controller ap3586a/b/c mar. 2012 rev. 1. 1 bcd semiconductor manufacturing limited 16 mechanical dimensions (continued) psop-8 unit: mm(inch) 3.202(0.126) 3.402(0.134) important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing co., ltd. 800 yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd., shenzhen office unit a room 1203, skyworth bldg., gaoxin ave.1.s., nanshan district, shenzhen, china tel: +86-755-8826 7951 fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808 fax: +886-2-2656 2806 usa office bcd semiconductor corp. 30920 huntwood ave. hayward, ca 94544, usa tel : +1-510-324-2988 fax: +1-510-324-2788 - headquarters bcd semiconductor manufacturing limited no. 1600, zi xing road, shanghai zizhu sc ience-based industrial park, 200241, china tel: +86-21-24162266, fax: +86-21-24162277 bcd semiconductor manufacturing limited important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing limited 800, yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 bcd semiconductor manufacturing limited main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd. shenzhen office advanced analog circuits (shanghai) corporation shenzhen office room e, 5f, noble center, no.1006, 3rd fuzhong road, futian district, shenzhen 518026, china tel: +86-755-8826 7951 fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808 fax: +886-2-2656 2806 usa office bcd semiconductor corporation 30920 huntwood ave. hayward, ca 94544, u.s.a tel : +1-510-324-2988 fax: +1-510-324-2788 - ic design group advanced analog circuits (shanghai) corporation 8f, zone b, 900, yi shan road, shanghai 200233, china tel: +86-21-6495 9539, fax: +86-21-6485 9673 bcd semiconductor manufacturing limited http://www.bcdsemi.com bcd semiconductor manufacturing limited |
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